It Is Time To Take Intel Seriously As A Chip Foundry

Prior to becoming the CEO of VMWare in 2012, Pat Gelsinger was a long-time Intel employee dating back to the Andy Grove era and Chief Technology Officer under Craig Barrett and Paul Otellini. It’s safe to say that Intel is in his blood. But when he announced his bold IDM 2.0 plan to become a leading semiconductor foundry shortly after taking over as Intel CEO in 2021, there was reason to be skeptical. At the time, Intel had lost its leadership in semiconductor process technology struggling to bring the prior process nodes to production, and the company was facing stiffer competition in its traditional markets for PC and server processors. There is no better proof than execution and in just three short years, not only is Intel on track to meet the goals Mr. Gelsinger outlined, but Intel is starting to look like an entirely different company.

The Challenges of being an IDM

A key part of Mr. Gelsinger’s strategy was IDM 2.0. For those not familiar with the term, IDM stands for Integrated Device Manufacturer, the term for semiconductor companies that both design and manufacture chips. By contrast, most of the semiconductor companies have shifted to a fabless or fab-light business model relying on semiconductor foundries and packaging companies to manufacture and complete the back-end assembly and testing of chips for some or all semiconductor products. There are still several semiconductor companies that continue to invest in or at least maintain some level of manufacturing, such as Intel, Microchip, Micron, NXP, Onsemi, Samsung, SK Hynix and Texas Instruments to name a few. Most of these companies invest in manufacturing because of the specialized nature of the manufacturing process for their products. Most companies making logic components (processors, microcontrollers, Digital Signal Processors (DSPs), Graphics Processing Units (GPUs), Field Programmable Gate Arrays (FPGAs), etc. have outsourced the manufacturing. Outsourcing significantly reduces the capital and R&D overhead by sharing the costs with other semiconductor companies through foundries like GlobalFoundries, Samsung, SMIC, TSMC and UMC. GlobalFoundries was created as the result of the spinout of AMD’s manufacturing group back in 2009.

Investing in semiconductor manufacturing is a costly endeavor. It requires a constant investment in new manufacturing process technology to continue the improvement in semiconductor performance, density, and cost as outlined in Moore’s Law, and it requires the continued investment in new manufacturing capacity. Both expenses have been increasing exponentially over the history of the semiconductor industry. Intel estimates that the shift to Extreme Ultraviolet (EUV) lithography technology raised the cost of a new fab to approximately $25 billion and the next generation high numerical aperture (High-NA) EUV technology will increase this even further to upwards of $30 billion. Without going into technical details, the best way to think of these technologies is as more advanced technologies that enable smaller design features on a chip to the point where we will soon be reducing them to the size compared to single atoms.

The Shift to IDM 2.0

The IDM 2.0 strategy as outlined by Mr. Gelsinger involved three key components for “technology and product leadership”: 1) expand Intel’s manufacturing capacity with industry leading process technology, 2) expand the use of third-party foundry capacity to meet the internal needs of Intel, and 3) to become a world-class foundry with a goal of being the number two foundry by 2030. Embedded in these high-level goals was the promise to deliver five new process nodes in four years to regain Intel’s process technology leadership and expand fab capacity at an estimated cost of $100B through both expansions at existing fabs and six new fabs in Arizona, Ohio, and Germany. Goals that were both ambitious and requiring an investment well beyond anything the industry had ever seen before.

At the same time, IDM 2.0 required a shift in Intel’s business strategy to becoming a foundry, a task that is not easy to do. Both Samsung and GlobalFoundries have made the transition, but with some significant challenges. GlobalFoundries became a pure foundry similar to TSMC while Samsung became a company split between products and foundry services, similar to the model Intel is pursuing. Intel attempted to provide foundry services before but was not competitive. Intel was not competitive in price unless it was a very large chip, required the use of Intel’s proprietary tools, and Intel was unwilling to modify its manufacturing process for each individual product, a key requirement to deliver an optimized and differentiated product, especially for cost and power sensitive applications like mobile devices. So, to be successful, Intel had to start thinking and acting like an independent foundry.

The Proof Points

The first proof point that Intel is successfully making the transition to a foundry and meeting the goals of IDM 2.0 was opening not only Intel fabs, but also Intel packaging for foundry services. Intel has a long R&D investment in advanced packaging. It was one of the first companies to use multichip modules, to demonstrate stacked die using though silicon vias (TSVs) and is now pioneering the use of glass substrates for future high-performance applications. Intel had been approached in the past by companies looking to leverage its expertise in packaging, but refused the business unless it was also fabricating all the die. Opening up its advanced packaging capabilities to other companies was the initial foundry revenue boost for Intel under IDM 2.0 and it has been accompanied in investment in additional packaging capacity, particularly for its embedded multi-die interconnect (EMIB) and 3D Foveros packaging capabilities in its current facilities in New Mexico and Malaysia, and a new facility in Poland.

The second proof point was to deliver on the new process technologies and return Intel to a competitive and, eventually, leadership position. This led to the goal of delivering five new process nodes in four years. As outlined at Intel’s recent Direct Connect conference, the company has delivered on that promise with the tapeout of the first Clearwater Forest server processors on the fifth of these process nodes dubbed 18A. In addition, the company announced a sixth major process node 14A and introduced several specialized subnodes, something that is common foundries to meet the varied needs of different products and applications.

Intel also went a step further to discuss how it believes it compares to the other leading foundries in each of the process nodes and in advanced packaging to demonstrate both where it is currently trailing the competition and when it will surpass the competition. According to Intel, the 18A process node will put the company back on par or, in some cases, ahead of the competition, especially for high-performance computing (HPC) applications. Intel believes the 14A generation will put the company well ahead of the competition even for mobile applications. Intel plans to return to a more normal 2-year process node cadence thereafter.

The third proof point is both the increase in manufacturing capacity investment and the change in how that investment will be managed. With the interest in governments to secure future semiconductor manufacturing for both supply security and economic growth, Mr. Gelsinger went on a spending spree with investment in expanding capacity in Oregon, Ireland, and Israel, as well as six new fabs in Arizona, Ohio, and Germany. Most of the initial investment was made without the promise of government grants, such as the US Chips Act. However, Intel has now secured more than $50B from US and European government incentives, customer commitments starting with its first five customers on the 18A process node, and its financial partners. Intel has also secured an additional $11B loan from the US government and a 25% investment tax credit.

In addition to it’s own investment in fab capacity, Intel is partnering with Tower Semiconductor and UMC, two foundries with long and successful histories. Tower will be investing in new equipment to be installed in Intel’s New Mexico facility for analog products, and UMC will partner with Intel to leverage three of the older Arizona fabs and process nodes, starting with the 12nm, to support applications like industrial IoT, mobile, communications infrastructure, and networking.

The second side of this investment is how current and future capacity will be used. As strictly an IDM, Intel has historically capitalized on its investments in the physical fab structures by retrofitting the fabs after three process nodes, on average. While this allowed for the reuse of the structures and infrastructure, it eliminated support for older process nodes, which are important for many foundry customers. According to Omdia Research, less than 3% of all semiconductors are produced on the latest process nodes. As a result, Intel is shifting from retrofitting fabs for new process nodes to maintaining fabs to support extended life cycles of older process nodes, as shown in the chart below. This requires additional capacity for newer process nodes.

It should be noted that a fab can support multiple process nodes. There is often a high reuse in equipment between process nodes. The difference is often the number of steps using one process versus another, such as immersion lithography vs EUV lithography. However, there are process node transitions that require a higher investment in new capacity, such as with the transition to the 14A node because of the introduction of High-NA lithography. Intel believes that it has reach a peak in terms of new capital investment in 2024. The result will be lower investment and a higher return beginning in 2025, especially as new customers begin leveraging Intel’s older and fully depreciated process nodes.

The fourth proof point, and the most impressive to me, is Intel’s rapid shift to supporting industry standard Electronic Design Automation (EDA) tools. As indicated at the Direct Connect conference, Intel now supports all the industry standard EDA tools from companies like Ansys, Cadence, Siemens, and Synopsys. This is critical to enabling ease of use of Intel’s foundry services. It also overcomes one of the biggest hurdles that prohibited other semiconductor vendors from using Intel as a foundry in the past.

The fifth proof point is completing the separation of the manufacturing organization, now referred to as Intel foundry. This week, Intel announced the new reporting structure of Intel foundry, including breaking out and restating the financials back to 2021, outlining a common model for charging both internal and external customers, providing a revenue and profitability forecast for both the Intel products and Intel foundry groups going forward. What the financials demonstrated was how inefficient the Intel foundry has been, primarily due to the lack of accountability of the product groups for things like expedited runs, long test times, large engineering sample orders, and underutilized capacity.

By the numbers, Intel foundry has and will continue to lose money in the short-term, but Intel believes it will drive higher profitability for both Intel products (60% GM/40% OM) and the Intel foundry (40% GM/30% OM) by 2030.

One of the benefits external customers will have using Intel foundry is that the process will already be well tested and in high-volume production for Intel products. This should significantly reduce the production ramp time for external customers. Intel is forecasting $15B in revenue from external customers for advanced packaging, advanced EUV process nodes, and older process nodes by 2030 with strong profit margins for each. As a result, Intel believes that it will be back to double digit ROIC figures by 2030.

The final proof point is Intel’s view of what being a foundry means. Intel is looking beyond just the fabrication and assembly of chips for its external customers. Intel views Intel foundry as a systems foundry that will provide a variety of services that leverage the breadth of Intel’s engineering expertise from semiconductor process technology all the way through system development. As Mr. Gilsinger stated, “the rack is becoming a system, and the system is becoming a chip.” Due to the ever-increasing performance requirements, especially by generative AI workloads, there will be increasing needs to put processing, memory, and networking closer together. Tirias Research believes that how we think of a chip will change drastically by 2030. In the highest performance cases, a “chip” may be a single package that requires 2000W or more. This drastically changes how you think about architecting a system.

It is Intel’s Time

While there were reasons to be cautious, even doubtful, of Mr. Gelsinger’s ambitious IDM 2.0 goals for Intel, the company has delivered and is on the path to becoming a world-class and leading semiconductor foundry service. That’s not to say that challenges do not still exist. Intel has publicly stated they have five customers for the 18A process node. Tirias Research believes that scaling the organization in terms of manufacturing and technical support for more than those handful of external customers will be challenging in a tight labor market for those with the necessary skills. Some scaling can be accomplished through additional tools and automation, but people are still a critical asset. Additionally, Intel will be ramping many new geographically diverse fabs over the next decade. That is also no easy feat. However, the geographic diversity will be a benefit both to Intel and its customers.

At this point, it appears that the huge bet that Mr. Gelsinger made on IDM 2.0 is on schedule and will pay off in the long run for Intel, the semiconductor industry, and the US and European economies where most of the investment is currently being made.