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  1. IEEE Xplore
    https://ieeexplore.ieee.org/document/8325323

    A 4266 Mb/s/pin LPDDR4 Interface With An Asynchronous …

  2. Semantic Scholar
    https://www.semanticscholar.org/paper/A-4…

    A 4266 Mb/s/pin LPDDR4 Interface With An …

    WEBMar 26, 2018 · A 4266Mb/s/pin LPDDR4 interface with an asynchronous feedback continuous-time linear equalizer (AF-CTLE) and an adaptive 3-step eye detection algorithm for memory controller is presented. The AF …

  3. ResearchGate
    https://www.researchgate.net/publication/324020309...

    A 4266Mb/s/pin LPDDR4 Interface with an Asynchronous …

  4. X-MOL科学知识平台
    https://www.x-mol.com/paper/1409611449838129152?adv

    A 4266Mb/s/pin LPDDR4 Interface with an Asynchronous …

  5. Loughborough University Library
    https://vufind.lboro.ac.uk/PrimoRecord/cdi_ieee...

    Staff View: A 4266 Mb/s/pin LPDDR4 Interface With An …

  6. Google Scholar
    https://scholar.google.com/citations?user=b3wEnOUAAAAJ

    ‪Joo-Hyung Chae‬ - ‪Google Scholar‬

  7. Semantic Scholar
    https://www.semanticscholar.org/paper/23.6-A-0.6V...

    23.6 A 0.6V 4.266Gb/s/pin LPDDR4X interface with ... - Semantic …

  8. Semantic Scholar
    https://www.semanticscholar.org/paper/A-4…

    Figure 1 from A 4266 Mb/s/pin LPDDR4 Interface With …

    WEB- "A 4266 Mb/s/pin LPDDR4 Interface With An Asynchronous Feedback CTLE and An Adaptive 3-Step Eye Detection Algorithm for Memory Controller" Fig. 1. Architecture of our LPDDR4 memory controller.

  9. dblp
    https://dblp.org/rec/journals/tcas/KimCCHKJK18

    "A 4266 Mb/s/pin LPDDR4 Interface With An Asynchronous …

  10. R Discovery
    https://discovery.researcher.life/article/a-4266...

    A 4266 Mb/s/pin LPDDR4 Interface With An Asynchronous …

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